NPTEL Advanced Computer Architecture Week 3 Assignment Answers 2024

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NPTEL Advanced Computer Architecture Week 3 Assignment Answers 2024

1. Consider the following statements:

S1: The immediate values embedded in the instruction are expanded to full 32 or 64-bit numbers in the decode stage.
S2: Decoding never involves computation of the branch targets.

  • Only S1 is true
  • Only S2 is true
  • Both S1 and S2 are true
  • Both S1 and S2 are false
Answer :- For Answer Click Here 

2. The early computation of the value of the stack pointer can help to issue the __________ instructions to the stack pointer early.

  • return
  • branch
  • load
  • none of these
Answer :- For Answer Click Here 

3. Consider the following statements.

S1: An architectural register can be mapped to multiple physical registers at the same time.
S2: To ensure precise exceptions, the architectural registers should appear to be updated in-order.

  • Only S1 is true
  • Only S2 is true
  • Both S1 and S2 are true
  • Both S1 and S2 are false
Answer :- For Answer Click Here 

4. Consider the following statements.

S1: In-order processors automatically respect all data and control dependencies.
S2: False dependencies arise due to the limited number of registers.

  • Only S1 is true
  • Only S2 is true
  • Both S1 and S2 are true
  • Both S1 and S2 are false
Answer :- 

5. Having an infinite number of registers__________________ eliminate RAW (Read after Write) dependencies. The ________________registers are not visible to software or any other entity outside the processor.

  • can, physical
  • cannot, physical
  • can, architectural
  • cannot, architectural
Answer :- 

6. The DCL(Dependency Check Logic) is a _____________structure that is used in the____________ stage.

  • software, rename
  • hardware, decode
  • hardware, rename
  • software, decode
Answer :- For Answer Click Here 

7. Consider the following statement.

S1: Depending on the value of the available bit, the instruction may or may not have to wait in the instruction window.
S2: The renaming of the registers can be done in-order as well as out of order.

  • Only S1 is true
  • Only S2 is true
  • Both S1 and S2 are true
  • Both S1 and S2 are false
Answer :- 

8. Consider the following statements.

S1: The instruction select policy has no implication on performance.
S2: In case of load-use hazards, there is a 2-cycle latency for producer instructions.

  • Only S1 is true
  • Only S2 is true
  • Both S1 and S2 are true
  • Both S1 and S2 are false
Answer :- 

9. Consider the following statements.

S1: We broadcast the tags rather than the values. One of the reasons is early broadcasts.
S2: If the execution of an instruction requires k cycles, we broadcast the tags k-1 cycles after it gets selected.

  • Only S1 is true
  • Only S2 is true
  • Both S1 and S2 are true
  • Both S1 and S2 are false
Answer :- 

10. Match the following:

NPTEL Advanced Computer Architecture Week 3 Assignment Answers 2024
  • (i)-c, (ii)-a, (iii)-b, (iv)-d
  • (i)-b,(ii)-c,(iii)-d,(iv)-a
  • (i)-a,(ii)-d,(iii)-c,(iv)-b
  • (i)-d,(ii)-b,(iii)-a,(iv)-c
Answer :- For Answer Click Here